This page highlights ongoing research into Energy-Recovering VLSI at the University of Michigan Advanced Computer Architecture Laboratory.





Past Research

True Single-Phase Adiabatic Multiplier

Energy Recovery Principle

During the operation of conventional CMOS circuitry, charge is transferred between circuit capacitors and fixed power supply voltages. The per-cycle energy consumption of CMOS designs is thus proportional to the product CV^2, where C is the total switched capacitance, and V is the difference between the power and ground voltages. In energy recovery design, charge is transferred in a controlled manner across low voltage drops. Furthermore, the energy stored in certain large capacitive nodes in a VLSI design is recovered through the use of inductors or a network of switched capacitors.


This research was supported in part by the US Army Research Office under Grants No. DAAD19-99-1-0304 and No. DAADD19-03-1-0122.